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Fujitsu-Siemens Amilo Pi1505

D25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24 D C B I24089147 C128 C157 C131 C45 C130 C100 C83 C153 1u/10V/Y5V/0603 1u/10V/Y5V/0603 1u/10V/Y5V/0603 1u/10V/Y5V/0603 1u/10V/Y5V/0603 1u/10V/Y5V/0603 1u/10V/Y5V/0603 1u/10V/Y5V/0603 C98 0.1u C398 0.1u C421 0.1u C67 0.1u A C70 0.1u C403 0.1u C102 0.1u C417 C408 C416 4.7u/10V/0805 C396 0.1u 4.7u/10V/0805 C402 0.1u 4.7u/10V/0805 C407 C420 0.1u 4.7u/10V/0805 +1.05V A Name of Part Project CPU_POWER L50II0 Rev C Sheet Date: Tuesday, April 25, 2006 3255 5 4 3 2 6 / 33 UNIWILL COMPUTER CORP. 1 5 4 3 2 1 +3.3V Close pin 28,42 CLK_VDDA L35 QT1608RL600 C247 C249 C248 0.1u Close pin 50 Reserved FOR EMI C250 0.1u 0.1u *4.7u/10V/X5R/0805 Close pin 56 Close pin 1,7 R266 D C251 10p D PCI_CLK_LAN Z0703 C473 10p PCI_CLK_1394_A C242 10p PCI_CLK_LPC C475 10p PCI_CLK_SB C237 10p PCI_CLK_DEBUG C241 10p CLK_BSEL1 C476 10p CLK_BSEL0 L33 QT1608RL600 2.2R/0603_1% C243 C245 2.2R/0603_1% , 1= Pin 14/15 DOT 96MHZ , Pin 17/18 LCDCLK 0= Pin 14/15 27MHZ Fix/SS Pin 17/18 PCIEX CLK_BSEL2 7 1 VDDPCI0 Z0704 VDD_REF_CR PLL VDDA PowerGNDA 45 46 CLK_VDDA PCI/PCIEX_STOP# CPU_STOP# 63 62 STP_PCI# STP_CPU# R434 R436 0R *0R CPUCLKT1 CPUCLKC1 49 48 GMCH_HCLK GMCH_HCLK# R448 R450 22R 22R 52 51 CPU_HCLK CPU_HCLK# R442 R444 22R 22R PCIEXT1 PCIEXC1 19 20 PCIE_CLK1 PCIE_CLK1# R269 R272 22R 22R PCIEXT2 PCIEXC2 22 23 PCIE_CLK2 PCIE_CLK2# R451 R452 22R 22R PCIEXT3 PCIEXC3 24 25 PCIE_CLK3 PCIE_CLK3# R453 R455 22R 22R 30 31 PCIEXT5 PCIEXC5 36 35 PCIEXT6 PCIEXC6 39 38 PCIE_CLK6 PCIE_CLK6# R454 R456 22R 22R PCIEXT7 PCIEXC7 41 40 PCIEXT8 PCIEXC8 44 43 DOTT_96M DOTC_96M 14 15 VTT_PWRGD#/PD 5 10 VDD48 VDDREF PCICLK3 PCI_CLK4 4 PCICLK2_2X 33R PCI_CLK3 3 PCICLK1_2X 33R PCI_CLK1 64 PCICLK0_2X R253 R439 16 CLK_ICH14 16 CLK_USB48 11 56 PCIEXT4 PCIEXC4 PCI_CLK5 33R R256 R437 16 PCI_CLK_SB CLK_BSEL1 33R R250 21 PCI_CLK_DEBUG 5 CLK_BSEL1 5 CLK_BSEL0 1R/0603_1% VDDCPU R251 21 PCI_CLK_LPC 5 CLK_BSEL2 50 R433 18 PCI_CLK_1394_A C VDDPCIEX VDDPCIEX R274 19 PCI_CLK_LAN Bsel [0,2] Vil = 0.3 Vih = 0.7 0.1u CPUCLKT0 CPUCLKC0 28 42 RB-M1 SELDOT U18 VDDPCI1 1u Pin3,4,5,12,64 programming to "normal" driving. *10K 33R Z0707 PCI_CLK2 IP CLK_BSEL2 CLK_BSEL1 9 8 SELDOT/ PCICLK_F1 PCICLK_F0 5,21 SMBDAT_EC 5,21 SMBCLK_EC 61 60 12 FLSC/REF1 FLSB/REF0 FLSA/USB_48M_2X 55 54 33R 33R SDATA SCLK 17 18 LCD_SSCGT/PCIEXOT LCD_SSCGC/PCIEXOC 26 27 SATACLKT SATACLKC R449 22R 22R Z0701 Z0702 SATA_CLKP_ C SATA_CLKN_C +3.3V 33 32 34 16 PEREQ4# PEREQ3# PEREQ2# PEREQ1# XTAL_OUT XTAL_IN 57 58 X2_OUT X1_IN IREF 47 VREF 23 NEW_CARD_REQ# 9 GMCH_CLK_REQ# 23 MINICARD_CLK_REQ# check R267 9LPR310-CLK XTAL_OUT Xtal Power C244 0.1u Add to check list PM_STPPCI# 16 PM_STPCPU# 16,20 CLK_MCH_BCLK 8 CLK_MCH_BCLK# 8 CLK_CPU_BCLK 5 CLK_CPU_BCLK# 5 GCLK GCLK# 9 9 CLK_PCIE_NEW_CARD 23 CLK_PCIE_NEW_CARD# 23 C CLK_PCIE_ICH 16 CLK_PCIE_ICH# 16 CLK_PCIE_Mini card 23 CLK_PCIE_Mini card# 23 +3.3V DOT_96CLK DOT_96CLK# R443 R447 22R 22R NB_DOT_96CLK 9 NB_DOT_96CLK# 9 R259 10K MAX8771_CLKEN# 27 GND GND GND GND GND GND GND GND R273 R275 15 SATA_CLKP 15 SATA_CLKN 22R 22R GCLK => PCI-E & DMI (100MHZ) DREFCLK => Dispaly PLLA ( nun- ss 96MHZ) DRESSFCLK => Display LVDS PLLB ( ss 100MHZ) 2 6 13 21 29 37 53 59 R268 R271 9 NB_LVDS_SSCLK 9 NB_LVDS_SSCLK# 100R 1u R264 C246 PCI-E Power C240 0.1u R265 PCI Power VDD_A_CR 4.3K_1% XTAL_IN B B Y4 Ce = 2*CL - ( Cs + Ci ) CL = Crystal Load Cap = 20P Ci = IC internal Cap = 5P 14.318MHz_DIP R249 *10M C239 C238 Cs = 2P 33p 33p Ce = Crystal external Cap = 33P FS4 FS3 BSEL2 FSLC BSEL1 FSLB BSEL0 CPU FSLA MHZ PSB533 0 0 1 133 0 0 1 1 166 0 1 0 0 1 133 PSB667 hexainf@hotmail.com GRATIS - FOR FREE 0 0 PSB533 A 0 PS