Платформа установлена в:

BENQ Joybook U102

t; H_DSTBP#2 <4> H_DSTBP#3 <4> DDR_CS0# DDR_CS1# <11> DDR_CS0# <11> DDR_CS1# H_ADS# <4> H_ADSTB#0 <4> H_ADSTB#1 <4> M_ODT0 M_ODT1 <11> M_ODT0 <11> M_ODT1 +1.8V 15mil R44 R44 R43 R43 2 80.6_0402_1% 2 80.6_0402_1% 1 1 +DIMM_VREF 1 2 SMRCOMPN SMRCOMPP 2 K32 K31 C17 F18 A3 SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3 AN12 AN14 AA33 AE1 SM_RCOMPN SM_RCOMPP SM_VREF_0 SM_VREF_1 Layout Note: +DIMM_VREF trace width and spacing is 20/20. MCH_CLKSEL0 <12> MCH_CLKSEL1 <12> MCH_CLKSEL2 <12> D 2.2K_0402_5% DPRSLPVR 1 0210 Add C414 for noise C400 100P_0402_50V8J 2 H_THERMTRIP# 1 2 C414 C414 220P_0402_50V7K C414靠近北橋U18 Change C414 from 100p to 220p 0319 SM_OCDCOMP_0 SM_OCDCOMP_1 AE12 AF14 AJ14 AJ12 10uA 1 RESERVED1 RESERVED2 RESERVED7 RESERVED8 RESERVED9 MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2 CFG3 @ PAD T1 CFG5 1 2 CFG6 R23 R23 @ PAD T2 C18 E18 G20 G18 J20 J18 0120 Add C400 for noise SM_CK_0 SM_CK_1 AK1 AN30 C428 close to U18 AF33 AG1 AJ1 AM30 <11> M_CLK_DDR0 <11> M_CLK_DDR1 CFG_0 CFG_1 CFG_2 CFG_3 CFG_5 CFG_6 CFG/RSVD CFG/RSVD A10 A6 C15 J1 K1 H1 H_D#[16..31] H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 PM <4> F8 D12 C13 A8 E13 E12 J12 B13 A13 G13 A12 D14 F14 J13 E17 H15 G15 G14 A15 B18 B15 E14 H13 C14 A17 E15 H17 D17 G17 DMI H_XRCOMP H_XSCOMP +H_SWNG0 H_YRCOMP H_YSCOMP +H_SWNG1 D H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 DDR2 MUXING H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63 C54 C54 0.1U_0402_16V4Z C4 F6 H9 H6 F7 E3 C2 C3 K9 F5 J7 K7 H8 E5 K8 J8 J2 J3 N1 M5 K5 J5 H3 J4 N3 M4 M3 N8 N6 K3 N9 M1 V8 V9 R6 T8 R2 N5 N2 R5 U7 R8 T4 T7 R3 T5 V6 V3 W2 W1 V2 W4 W7 W5 V5 AB4 AB8 W8 AA9 AA8 AB1 AB7 AA2 AB5 CLK U18A H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 1 H_A#[3..16] <4> C61 C61 0.1U_0402_16V4Z H_D#[0..15] HOST HOST <4> PM_ICHSYNC# PM_BMBUSY# PM_EXTTS#_0 PM_EXTTS#_1 THRMTRIP# PWROK RSTIN# D_REFCLKN D_REFCLKP D_REFSSCLKN D_REFSSCLKP CLKREQ# MCH_ICH_SYNC# MCH_ICH_SYNC# <15> PM_BMBUSY# PM_BMBUSY# <17> PM_EXTTS#0 PM_EXTTS#0 <11> PM_EXTTS#12 1 DPRSLPVR <17,37> R26 R26 0_0402_5% H_THERMTRIP# H_THERMTRIP# <4,16> ICH_POK ICH_POK <17,25> PLTRST_R# 1 2 PLTRST# <15,17,19,24,25> R33 R33 100_0402_5% E31 G21 F26 H26 J15 AB29 W27 A27 A26 J33 H33 J22 C CLK_MCH_DREFCLK# <12> CLK_MCH_DREFCLK <12> MCH_SSCDREFCLK# <12> MCH_SSCDREFCLK <12> MCH_CLKREQ# <12> QG82945GSE SLB2R A3_FCBGA998 0210 Add C416 for noise PLTRST# SMRCOMPN and SMRCOMPP trace width 15mil 1 C416 C416 220P_0402_50V7K 2 H_HIT# <4> H_HITM# <4> H_LOCK# <4> C416靠近R33 Change C416 from 100p to 220p 0319 H_REQ#[0..4] H_RS#[0..2] B <4> <4> H_CPUSLP# <4> H_TRDY# <4> QG82945G